Annual Symposium

8:00 to 8:30 

Registration Breakfast

8:30 to 9:30  

Welcome and Plenary Speaker 1, Main Room

Dr. Guoan Wang, University of South Carolina. Title “Toward Fully Electrically Reconfigurable RF and Microwave Technologies with Novel Thin Films and Techniques”

Abstract:  The fastest growing wireless communications market has and will continuously see dramatic changes in both the requirements on, and the capabilities of radios to support the wireless connections especially in future 5G technologies.  Tunable RF technologies are enabling new frontiers for reconfigurable RF front-ends. Miniaturized multifunctional frequency-agile devices are highly demanded to support multiple communication standards in modern and next generation military and commercial applications.  While the active circuitries in RF front-end are experiencing higher levels of integration with the scaling of more advanced semiconductor technology, there are technological barriers of integration to achieve further miniaturized communication systems due to large amount of discrete RF passives on board.

This talk will present the development of frequency agile and fully electrically tunable miniaturized RF and microwave devices with different novel thin films and related techniques (i.e., on-chip tuning) enabling multifunctional and adaptive radios.  First, the needs and requirements for adaptive and reconfigurable frequency control components in next generation wireless devices will be described.  Overview of current tuning techniques (e.g., RF MEMS, ferroelectric and ferromagnetic films) will be briefly discussed and summarized, followed by the applications of these components in adaptive wireless systems.  Design and integration of transmission line structures with both nano-scale patterned ferromagnetic (e.g., permalloy) and ferroelectric (e.g., PZT) thin film patterns will be demonstrated and investigated for their efficacy in developing fully electrically tunable RF components (e.g., phase shifter, filter, antenna). Finally on-chip tuning techniques and challenges on co-design of active and passive components to enable future 5G communication system will be presented.

Dr. Guoan Wang received his Ph.D. in Electrical and Computer Engineering from the Georgia Institute of Technology in 2006. He joined the University of South Carolina in 2011, where he is currently a tenured Associate Professor and Director of SMART Microwave and RF Technology Laboratory in the Department of Electrical Engineering. He worked as an Advisory Scientist responsible for on chip mmwave passives and wafer level RF MEMS technologies in IBM Semiconductor Research and Development Center from 2006-2011. His current research areas include tunable RF and microwave electronics, novel materials/techniques for smart RF applications, MEMS/NEMS, sensors and sensing systems, wireless energy harvesting, and 3D integrated devices/system. Dr. Wang’s research work has produced over 110 papers in peer-reviewed journals and conferences proceedings, one book (Smart RF Passive Components: Novel Materials, Techniques, and Applications, Artech House). He also has 49 granted US and international patents, and 48 pending patent applications.

Dr. Wang is an Associate Editor of IEEE Microwave and Wireless Components Letters, a guest editor of IEEE Access, and an Editorial Board member of International Journal of RF and Microwave Computer‐Aided Engineering. He is a member of Technical Coordinating Committee for IEEE MTT RF MEMS (MTT-21), and IEEE MTT-S Biological Effects and Medical Applications of RF and Microwave (MTT-10). He has been served in Steering Committees, Technical Program Committees, and Session Chairs of many IEEE conferences include International Microwave Symposiums and IEEE Antennas and Propagation Symposium. Dr. Wang is a recipient of IEEE Region 3 Outstanding Engineering Award in 2018, NSF Early Faculty Development (CAREER) Award in 2012, USC Breakthrough Star Award in 2016, multiple IBM Invention Achievement Awards, NASA Tech Brief Award, and Young Faculty Development Award from Southeastern Center for Electrical Engineering Education in 2013.

9:40 to 11:10

Workshop 1,  Keysight
(Main Room)

OJ Danzy and Russ Kramer

Topic: “The Power Integrity Ecosystem…..it’s more than decoupling capacitors”

Abstract: The paper will cover aspects of the signal integrity and power integrity efforts in modern day electronic circuits with their high levels of integration. The full SI and PI Eco-System looks at validating the Signal Integrity with the addition of the degradation caused by the Power Delivery network. The paper will discuss ways to do this.

Bio: Russ Kramer has been with HP/Agilent Technologies/Keysight Technologies since 1998. He received a BSEE and an MSEE from Penn State University Park and an MBA from Loyola University. His interests and experience are in semiconductor processing, RFIC, MMIC, and high speed ASIC design. He has experience on GaAs, SOI CMOS, and SiGe BiCMOS processes. He is a member of ETA KAPPA NU and TAU BETA PI and a sr. member of IEEE.

Presentation File

Workshop 2, Ansys
 Chris Mesibov

Topic: “Advancements in the SI/PI Simulation Process”

Abstract: The demands on printed circuit board performance are continuously increasing.  PCB fabricators scramble to implement lamination and via technologies to meet the needs that high speed, high current and high-density circuitry impose.  Simulation technology used to validate the confluence of all these processes and technologies is rising to meet the demand.  Recent updates to the ANSYS SI product suite, once again provide simulation tools to the SI engineer that enable accurate and fast analysis. Combining package and circuit model extraction and analysis, the ANSYS SI/PI suit of tools has reduced the steps involved and streamlined the simulation time using a graphical user interface or a completely automated process.

Chris Mesibov works for ANSYS Inc. with the international consulting group.  He is an electrical engineer with more than 35 years of industry experience with a strong concentration in signal integrity and analog circuit design.  Prior to joining Ansys, Chris worked for CAE associates performing HF simulations and in the telecommunications industry performing signal integrity analysis and opto-electronic designs for ROADM systems. His signal integrity analysis experience includes developing high-speed interfaces, operating up to 40GHz using ANSYS HFSS. He also developed electronic hot swappable power systems, fan controllers and optical network protection switching for telecom applications. Chris developed RF/uWave test equipment for defense and wireless industries, and in this field, he developed ultra-low noise power supplies, digital subsystems and optimized SSB block up-converter systems.  Chris has been awarded 3 patents for his work developing EDFA electronics for Fujitsu.

Presentation File

11:15 to 12:15 

Plenary Speaker 2

Dr. Piero Triverio, University of Toronto. Title "Fast Electromagnetic Analysis of 3D Interconnects Using a  Surface Integral Formulation"

Abstract: We present a new surface integral method for Maxwell's  equations which is very well suited for signal integrity analysis. A novel surface admittance operator is used to model skin and proximity effect inside conductive objects of arbitrary shape. The operator is computationally efficient, since it requires only a surface mesh, but broadband and Maxwell-accurate. Couplings between different conductive objects are modelled with the method of moments, accelerated with the adaptive integration method and iterative solution techniques. Several application examples related to 2D/3D integration will be presented to show the accuracy, robustness and scalability of the proposed method.

Dr. Piero Triverio received the Ph.D. degree in Electronic Engineering  from Politecnico di Torino in 2009. He is an Associate Professor with  the Department of Electrical and Computer Engineering at the University  of Toronto, where he holds the Canada Research Chair in Modeling of  Electrical Interconnects. He held visiting research positions at Carleton University and MIT. His research interests include signal  integrity, computational electromagnetism, model order reduction, and  computational fluid dynamics applied to cardiovascular diseases. Dr.  Triverio and his students received several international awards,  including the 2016 Ontario Early Researcher Award and the 2007 Best  Paper Award of the IEEE Transactions on Advanced Packaging.

12:15 to 1:10

Lunch Speaker:

Richard Mellitz, Samtec Distinguished Engineer, Title “Effective Return Loss for 112G and 56G PAM 4”

Abstract: This presentation proposes using a pulse echo for time domain reflectometry (TDR) rather the commonly used step function echo.  The echoed pulse response of a single symbol is convolved with the modulation signal levels to produce an effective reflection coefficient metric at a specified bit error ratio (BER).  A conversion to dB results in an effective return loss (ERL) in more familiar return loss units. ERL is a single value which replaces the commonly used frequency domain return loss (RL) mask. It makes RL grading simple, straightforward and meaningful.

Richard Mellitz is presently a Distinguished Engineer at Samtec, supporting interconnect signal integrity and industry standards. Prior to this, he was a Principal Engineer in the Platform Engineering Group at Intel.  Richard was a principal member of various Intel processor and I/O bus teams including Itanium®, Pentium®, PCI Express®, SAS®, and Fabric (Ethernet, IB, and proprietary).  Additionally, he has been a key contributor for the channel sections IEEE802.3 backplane and cabling standards, and for the Time domain ISI analysis for IEEE802.3 Ethernet, known as COM (Channel Operating Margin), which is now an integral part of Ethernet standards due to Rich’s leadership.  He founded and chaired an IPC (Association Connecting Electronics Industries) committee delivering IPC’s first PCB loss test method. Prior to this, Rich led industry efforts at IPC to deliver the first TDR (time domain reflectometry) standard which is presently used throughout the PCB industry.   Richard holds many patents in interconnect, signal integrity, design, and test. He has delivered numerous signal integrity papers at electronic industry design conferences. In 2017 he was awarded the IEEE SA Standards Medallion.

Presentation File

1:15 to 2:15

Plenary Speaker 3

Jason Ellison, Senior Staff Signal Integrity Engineer, Amphenol ICC, Title “In situ stripline laminate property extraction accounting for effective surface roughness losses”

Abstract: A method for extracting the effective copper surface roughness of a laminate in situ is introduced. The rough copper attenuation as a function of surface roughness is removed from the total attenuation. The residual loss is fit to coefficients, and an error is calculated based on the remaining apparent surface roughness contribution. When the error is minimized or when the apparent surface roughness contribution is nearest zero, the effective surface roughness is found, and the dielectric attenuation is isolated by subtracting the rough copper attenuation from the total attenuation. Using this value, accurate broadband permittivity values can be extracted by simply measuring the S-parameters of two stripline transmission lines. Further, the extracted dielectric electrical properties are calculated with a higher accuracy than the existing methods that neglect copper surface roughness. A supplementing method to unwrap the phase constant is also included in this work to avoid errors do to the length of the devices. Previous methods of extracting laminate material properties that consider copper surface roughness rely on cutting the sample to make a cross-section and observe the surface roughness directly. In this work, the effective surface roughness is gathered without destroying the sample.

Jason Ellison received his Master’s of Science degree in electrical engineering from Penn State University. He is employed a signal Integrity Engineer and develops high speed connectors, lab automation technology and calibration technology. His interests include signal integrity, power integrity and embedded system design. He also writes technical publications for journals such as “The Signal Integrity Journal. Mr. Ellison is a DesignCon technical program committee member.

Presentation File

2:30 to 4:00

Workshop 3 (Main Room)

Chris Scholz, Rohde & Schwarz USA, Inc.

Signal Integrity tools for PAM4 and beyond

As data rates increase and the applications move to higher-order modulation formats, VNAs become a crucial part of the Signal Integrity Engineers’ toolbox.

In this talk we will present the rich set of signal integrity tools available for modern VNAs. Specific topics addressed include estimation of channel capacity, channel equalization techniques, methods to characterize crosstalk, PAM4 and higher order modulation and advanced de-embedding techniques.

Chris Scholz is product manager for vector network analyzers for Rohde & Schwarz North America. He is responsible for applications, strategy, new product introductions and positioning of Vector Network in North America.

At Intel’s Silicon Valley Photonics Technology Operation, he was responsible for the development  of integrated photonic devices. He worked as applications engineer at LeCroy with focus on jitter analysis on high-speed oscilloscopes.

Chris worked as research faculty at the Georgia Institute of Technology and holds a Ph.D. degree in electrical engineering and a MS Degree in Aerospace Engineering from the Georgia Institute of Technology.

Workshop 4

Tracey Vincent, CST

Leveraging Complete Technology for Connector and other SI applications

Tracey is a Senior Application Engineer with the CST, part of the Simulia group of Dassault Systems. She is located in MA focusing on Signal Integrity and Materials Characterization for 3D simulations. She has a Masters Degree in Electrical and Electronic Engineering, a Masters degree in Numerical Techniques where she wrote a finite element program to solve fields in Ferrimagnetic materials and PhD in Material Science. Tracey was previously employed as a design engineer for more years that she cares to admit.